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a u s t ri a m i c r o s y s t e m s
AS1744 , AS1745
H i g h - Sp e e d , L o w - Vo l ta g e , D u a l , S i n g l e - S u p p l y, 4 , S P D T A n a l o g S w i t c h e s
D a ta S he e t
1 General Description
The AS1744/AS1745 are high-speed, low-voltage, dual single-pole/double-throw (SPDT) analog switches. Fast switching speeds, low ON-resistance, and low power-consumption make these devices ideal for singlecell battery powered applications. These highly-reliable devices operate from a +1.8 to +5.5V supply, are differentiated by inverted logic, and support break-before-make switching. With low ON-resistance (RON), RON matching, and RON flatness, the devices can accurately switch signals for sample and hold circuits, digital filters, and op-amp gain switching networks. The devices are available in a 10-pin MSOP package and a 10-pin TDFN package.
2 Key Features
!
ON-Resistance: - 4 (+5V supply) - 5.5 (+3V supply) RON Matching: 0.2 (+5V supply) RON Flatness: 1 (+5V supply) Supply Voltage Range: +1.8 to +5.5V 1.8V Operation: - 9.5 ON-Resistance over Temperature - 38ns Turn On Time - 12ns Turn Off Time Current-Handling: 100mA Continuous Break-Before-Make Switching Rail-to-Rail Signal Handling Crosstalk: -90dB at 1MHz Off-Isolation: -85dB at 1MHz Total Harmonic Distortion: 0.1% Operating Temperature Range: -40 to +85C Package Types: - 10-pin MSOP - 10-pin TDFN
! ! ! !
! ! ! ! ! ! ! !
3 Applications
The devices are ideal for use in power routing systems, cordless and mobile phones, MP3 players, CD and DVD players, PDAs, handheld computers, digital cameras, and any other application where high-speed signal switching is required.
Figure 1. Block Diagrams
1 IN1 2 NO1 3 GND 4 NO2 5 IN2
10 COM1 9 NC1
1
10 COM1 9 NO1
Truth Table
IN1 2 NC1 3 GND 4 NC2 5 IN2
INx
Low High
NOx to NCx to COMx COMx
Off On On Off
AS1744
8 V+ 7 NC2 6 COM2
AS1745
8 V+ 7 NO2 6 COM2
Switches shown for low input.
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4 Absolute Maximum Ratings
Stresses beyond those listed in Table 1 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Section 5 Electrical Characteristics on page 3 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 1. Absolute Maximum Ratings Parameter V+, IN1, IN2 to GND COMx, NOx, NCx to GND
Min -0.3 -0.3 -100 -150
Max +7 V+ + 0.3 +100 +150 330 1000 100
Units V V mA mA mW V mA C C C
Comments
COMx, NOx, NCx Continuous Current COMx, NOx, NCx Peak Current Continuous Power Dissipation (TAMB = +70C) Electro-Static Discharge Latch Up Immunity Operating Temperature Range Junction Temperature Storage Temperature Range
Pulsed at 1ms, 10% duty cycle Derate at 4.7mW/C above +70C HBM Mil-Std883E 3015.7 methods Norm: JEDEC 17
-40 -65
+85 150 +150
Package Body Temperature
+260
C
The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD-020C "Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices"
Signals on pins COM1, COM2, NO1, NO2, NC1, or NC2 that exceed V+ or GND are clamped by internal diodes. Limit forward-diode current to the maximum current rating.
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5 Electrical Characteristics
V+ = +4.5 to 5.5V, VIH = +2.4V, VIL = +0.8V, TAMB = TMIN to TMAX (unless otherwise specified). Typ Values @TAMB = +25C. Table 2. +5V Supply Electrical Characteristics Symbol Parameter Analog Switch VCOMx, Analog Signal VNOx, Range VNCx RON RON ON-Resistance Conditions Min Typ Max Unit
0 V+ = 4.5V, ICOMx = 10mA, VNOx or VNCx = 0 to V+ TAMB = +25C TAMB = TMIN to TMAX TAMB = +25C TAMB = TMIN to TMAX TAMB = +25C TAMB = TMIN to TMAX TAMB = +25C TAMB = TMIN to TMAX TAMB = +25C TAMB = TMIN to TMAX TAMB = +25C TAMB = TMIN to TMAX 0.5 -0.1 -0.3 -0.1 -3 -0.4 -4 2.4 0.01 0.01 0.1 2.5 0.1
V+ 4 4.5 0.2 0.4 1 1.2 0.1 0.3 0.1 3 0.4 4
V nA nA nA V V nA
ON-Resistance V+ = 4.5V, ICOMx = 10mA, Match Between VNOx or VNCx = 0 to V+ 1 Channels ON-Resistance V+ = 4.5V, ICOMx = 10mA, RFLAT(ON) 2 VNOx or VNCx = 0 to V+ Flatness INOx(OFF), NOx or NCx OffV+ = 5.5V, VCOMx = 1 or 4.5V, INCx(OFF) Leakage Current 3 VNOx or VNCx = 4.5 or 1V COMx OffV+ = 5.5V, VCOMx = 1 or 4.5V, ICOMx(OFF) 3 VNOx or VNCx = 4.5 or 1V Leakage Current COMx OnV+ = 5.5V, VCOMx = 4.5 or 1V, ICOMx(ON) 3 VNOx or VNCx = 4.5 or 1V Leakage Current Logic Input: INx VIH Input Logic High VIL Input Logic Low Input Leakage IIH, IIL VINx = 0 or +5.5V Current Switch Dynamic Characteristics tON tOFF tBBM Turn On Time Turn Off Time
3 3
0.8 -100 5 14 4 10 1 7 20 56 -52 100 17 18 6 8
Break-Before3 Make Q Charge Injection CNOx(OFF), NOx, NCx OffCNCx(OFF) Capacitance COMx OnCCOMx(ON) Capacitance VISO Off-Isolation
4
TAMB = +25C VNOx or VNCx = 3V, RLOAD = 300, CLOAD = 35pF, Figure 11 TAMB = TMIN to TMAX TAMB = +25C VNOx or VNCx = 3V, RLOAD = 300, CLOAD = 35pF, Figure 11 TAMB = TMIN to TMAX TAMB = +25C VNOx or VNCx = 3V, RLOAD = 300, CLOAD = 35pF, Figure 12 TAMB = TMIN to TMAX VGEN = 2V, RGEN = 0, CLOAD = 1.0nF, Figure 13 VNOx or VNCx = GND, f = 1MHz, Figure 14 VCOMx = GND, f = 1MHz, Figure 14 f = 10MHz, RLOAD = 50, CLOAD = 5pF, Figure 15 f = 1MHz, RLOAD = 50, CLOAD = 5pF, Figure 15 f = 10MHz, RLOAD = 50, CLOAD = 5pF, Figure 15 f = 1MHz, RLOAD = 50, CLOAD = 5pF, Figure 15 f = 20Hz to 20kHz, VNOx = 5Vp-p, RLOAD = 600
ns ns ns pC pF pF
dB -85 -52 dB -90 0.1 %
VCT
Crosstalk
5
Total Harmonic Distortion Power Supply Positive Supply I+ Current THD
V+ = 5.5V, VINx = 0 or V+
0.01
1.0
A
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V+ = +2.7 to 3.6V, VIH = +2.0V, VIL = +0.4V, TAMB = TMIN to TMAX (unless otherwise specified). Typ values @ TAMB = +25C. Table 3. +3V Supply Electrical Characteristics Symbol Parameter Analog Switch VCOMx, VNOx, Analog Signal Range VNCx RON RON RFLAT(ON) INOx(OFF), INCx(OFF) ICOMx(OFF) ICOMx(ON) ON-Resistance ON-Resistance Match Between 1 Channels ON-Resistance 2 Flatness NOx or NCx Off3 Leakage Current COMx Off-Leakage 3 Current Conditions Min Typ Max Unit
0 V+ = 2.7V, ICOMx = 10mA, VNOx or VNCx = 0 to V+ V+ = 2.7V, ICOMx = 10mA, VNOx or VNCx = 0 to V+ V+ = 2.7V, ICOMx = 10mA, VNOx or VNCx = 0 to V+ V+ = 3.3V, VCOMx = 1 or 3V, VNOx or VNCx = 3 or 1V V+ = 3.3V, VCOMx = 1 or 3V, VNOx or VNCx = 3 or 1V V+ = 3.3V, VCOMx = 1 or 3V, VNOx or VNCx = 1 or 3V TAMB = +25C TAMB = TMIN to TMAX TAMB = +25C TAMB = TMIN to TMAX TAMB = +25C TAMB = TMIN to TMAX TAMB = +25C TAMB = TMIN to TMAX TAMB = +25C TAMB = TMIN to TMAX TAMB = +25C TAMB = TMIN to TMAX -0.1 -0.3 -0.1 -3 -0.4 -4 2.0 0.1 0.01 0.01 1.5 0.1 5
V+ 5.5 8 0.2 0.4 2 2.5 0.1 0.3 0.1 3 0.4 4
V nA nA nA
COMx On-Leakage 3 Current Logic Input: (INx) VIH Input Logic High VIL Input Logic Low Input Leakage IIH,IIL Current Switch Dynamic Characteristics tON tOFF tBBM Q CNOx(OFF), CNCx(OFF) CCOMx(ON) VISO VCT Power Supply I+ Positive Supply Current Turn On Time Turn Off Time
3
V 0.4 V nA 5 17 6 11 100 23 28 8 10
VINx = 0 or +5.5V TAMB = +25C VNOx or VNCx = 2V, RLOAD = 300, CLOAD = 35pF, Figure 11 TAMB = TMIN to TMAX TAMB = +25C VNOx or VNCx = 2V, RLOAD = 300, CLOAD = 35pF, Figure 11 TAMB = TMIN to TMAX
-100
ns ns ns pC pF pF dB dB
3
Break-Before-Make Charge Injection NOx, NCx OffCapacitance COMx OnCapacitance Off-Isolation Crosstalk
5 4
3
TAMB = +25C VNOx or VNCx = 2V, RLOAD = 300, CLOAD = 35pF, Figure 12 TAMB = TMIN to TMAX VGEN = 1.5V, RGEN = 0, CLOAD = 1.0nF, Figure 13 VNOx or VNCx = GND, f = 1MHz, Figure 14 VCOMx = GND, f = 1MHz, Figure 14 f = 10MHz, RLOAD = 50, CLOAD = 5pF, Figure 15 f = 1MHz, RLOAD = 50, CLOAD = 5pF, Figure 15 f = 10MHz, RLOAD = 50, CLOAD = 5pF, Figure 15 f = 1MHz, RLOAD = 50, CLOAD = 5pF, Figure 15 V+ = 3.6V, VIN = 0 or +3.6V
1 0 20 56 -52 -85 -52 -90 0.01 1.0
A
1. RON = RON(MAX) - RON(MIN). 2. Flatness is defined as the difference between the maximum and the minimum value of ON-resistance as measured over the specified analog signal ranges. 3. Guaranteed by design. 4. Off-Isolation = 20log10(VCOMx/VNOx), VCOMx = output, VNOx = input to off switch. 5. Between any two switches.
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6 Typical Operating Characteristics
Figure 2. Frequency Response
10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 0.001 0.1 10 1000 0 1000 10000 100000
Bandwidth
Figure 3. THD vs. Frequency
0.12 0.1 0.08
Crosstalk
Loss (dB)
THD (%)
Isolation
0.06 0.04 0.02
Frequency (MHz) Figure 4. RON vs. VCOM and Temperature (VDD = 5V)
3.5 3.0
Temp = +85C
Frequency (Hz) Figure 5. RON vs. VCOM and Temperature (VDD = 3V)
4.5 4.0 3.5
Temp = +85C
RON ()
Temp = +25C
RON()
2.5 2.0
Temp = -40C
3.0 2.5 2.0 1.5
Temp = +25C
Temp = -40C
1.5 1.0 0 1 2 3 4 5
1.0 0.0 1.0 2.0 3.0
VCOM (V)
VCOM (V) Figure 7. tON/tOFF vs. Temperature (V+ = 5V)
25 20
Figure 6. RON vs. VCOM
14 12 10
RON ()
8 6 4 2
VDD = 1.8V VDD = 2.5V VDD = 3V VDD = 4.5V
tON/tOFF (ns)
15 10 5
tON
tOFF
VDD = 5V
0 0 1 2 3 4 5
0 -40 25 85
VCOM (V)
Temperature (C)
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ON-Resistance
Figure 8. tON/tOFF vs. Supply Voltage
40
Figure 9. Charge Injection
35 30
30
25 20
tON/tOFF (ns)
Q(pC)
20
tON
15 10 5
10
tOFF
0 -5 0
VDD = 3V
VDD = 5V
0 1.5 2.5 3.5 4.5 5.5
1
2
3
4
5
Supply Voltage (V)
VCOM (V)
7 Detailed Description
The AS1744/AS1745 are low ON-resistance, low-voltage, dual analog SPDT switches that operate from a single +1.8 to +5.5V supply. CMOS process technology allows switching of analog signals that are within the supply voltage range (GND to V+).
ON-Resistance
When powered from a +5V supply, the low RON (4 max) allows high continuous currents to be switched in a wide range of applications. All devices have low RON flatness (1, max) so they can meet or exceed the low-distortion audio requirements of modern portable audio devices.
Bi-Directional Switching
Pins NOx, NCx, and COMx are bi-directional, thus they can be used as inputs or outputs.
Analog Signal Levels
Analog signals ranging over the entire supply voltage (V+ to GND) can be passed with very little change in ON-resistance (see Typical Operating Characteristics on page 5).
Logic Inputs
The AS1744/AS1745 logic inputs (INx) can be driven up to +5.5V regardless of the supply voltage value. For example, with a +3.3V supply, IN+ may be driven low to GND and high to +5.5V. This allows the devices to interface with +5V systems using a supply of less than 5V.
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Power-Supply Sequencing
8 Application Information
Power-Supply Sequencing
Proper power-supply sequencing is critical for proper operation. The recommended sequence is as follows: 1. V+ 2. NOx, NCx, COMx Always apply V+ before applying analog signals, especially if the analog signal is not current-limited. If the above sequence is not possible, and if the analog inputs are not current-limited to less than 30mA, add a small-signal diode as shown in Figure 10 (D1). If the analog signal can dip below GND, add diode D2. Adding these diodes will reduce the analog range to a diode-drop (about 0.7V) below V+ (for D1), and a diode-drop above ground (for D2). Note: Operation beyond the absolute maximum ratings (see page 2) may permanently damage the devices.
Overvoltage Protection
ON-resistance increases slightly at lower supply voltages. Figure 10. Overvoltage Protection Using 2 External Blocking Diodes AS1744/AS1745 V+
D1 V+
NOx VGEN
COMx
GND D2
Adding diode D2 to the circuit shown in Figure 10 causes the logic threshold to be shifted relative to GND. Diodes D1 and D2 also protect against overvoltage conditions. For example, in the circuit shown in Figure 10, if the supply voltage goes below the absolute maximum rating, and if a fault voltage up to the absolute maximum rating is applied to an analog signal pin, no damage will result. Note: The supply voltage (V+) must not exceed the absolute maximum rating of +7V.
Power Supply Bypass
Power supply connections to the devices must maintain a low impedance to ground. This can be done using a bypass capacitor, which will also improve noise margin and prevent switching noise propagation from the V+ supply to other components.
Layout Considerations
High-speed switches require proper layout and design procedures for optimum performance.
! ! !
Reduce stray inductance and capacitance by keeping traces short and wide. Ensure that bypass capacitors are as close to the device as possible. Use large ground planes where possible.
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Timing Diagrams and Test Setups
Timing Diagrams and Test Setups
Figure 11. Switching Time AS1744/ AS1745
COMx tR < 5ns tF < 5ns 50% 50% tOFF 0.9 x VOUT 0.9 x VOUT
V+ VIN
V+ NOx or NCx NCx or NOx
VOUT CLOAD
VIH + 0.5V Logic Input 0 VOUT Switch Output 0
RLOAD INx Logic Input
tON GND
Logic input waveforms inverted for switches that have the opposite logic sense. Includes stray capacitance and fixture capacitance.
Figure 12. Break-Before-Make Interval AS1744/ AS1745
VIH + 0.5V COMx RLOAD VOUT CLOAD
tR < 5ns tF < 5ns
V+ VIN
V+ NOx or NCx NCx or NOx INx Logic Input
Logic Input 0
50%
VOUT GND
0.9 x VOUT
Includes stray capacitance and fixture capacitance.
tD
Figure 13. Charge Injection AS1744/ AS1745
VOUT VOUT NCx or NOx INx VOUT CLOAD Off INx INx depends on switch configuration; input polarity is determined by the sense of the switches. Q = VOUT x CLOAD Off On Off
V+ VINL to VINH
V+ INx
COMx RGEN VGEN GND
On
Off
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Timing Diagrams and Test Setups
Figure 14. NOx, NCx, and COMx Capacitance AS1744/ AS1745
V+ 10nF V+ COMx 1MHz Capacitance Analyzer
VINH or VINL
INx GND
NCx or NOx
Figure 15. Off-Isolation, On-Loss, and Crosstalk
Network Analyzer COMx V+ 10nF VIN 50 50
V+
AS1744/ AS1745
NCx V+ 50 NOx INx GND 50 50 VOUT Measure Reference
Notes: 1. Measurements are standardized against short-circuit at all terminals. 2. Off-isolation is measured between COMx and the off NCx/NOx terminal of each switch. Off-isolation = 20log(VOUT/VIN). 3. Crosstalk is measured from one channel to all other channels. 4. Signal direction through the switch is reversed; worst values are recorded.
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Pin Assignments
9 Pinout and Packaging
Pin Assignments
Figure 16. Pin Assignments (Top View)
IN1 1 NO1 2 GND 3 NO2 4 IN2 5
10 COM1 9 NC1
IN1 1 NC1 2 GND 3 NC2 4 IN2 5
10 COM1 9 NO1
AS1744
8 V+ 7 NC2 6 COM2
AS1745
8 V+ 7 NO2 6 COM2
Pin Descriptions
Table 4. Pin Descriptions Pin Number AS1744 10 6 3 1 5 9 7 2 4 8 AS1745 10 6 3 1 5 2 4 9 7 8 Pin Name COM1 COM2 GND IN1 IN2 NC1 NC2 NO1 NO2 V+ Analog Switch 1 Common Analog Switch 2 Common Ground Analog Switch 1 Logic Control Input Analog Switch 2 Logic Control Input Analog Switch 1 Normally Closed Terminal Analog Switch 2 Normally Closed Terminal Analog Switch 1 Normally Open Terminal Analog Switch 2 Normally Open Terminal Input Supply Voltage. +1.8 to +5.5V Description
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Package Drawings and Markings
Package Drawings and Markings
The devices are available in a 10-pin MSOP package and a 10-pin TDFN package. Figure 17. 10-pin MSOP Package
Symbol A A1 A2 D D2 E E1 E2 E3 E4 R R1 t1 t2
Typ 1.10 0.10 0.86 3.00 2.95 4.90 3.00 2.95 0.51 0.51 0.15 0.15 0.31 0.41
Tol Max 0.05 0.08 0.10 0.10 0.15 0.10 0.10 0.13 0.13 +0.15/-0.08 +0.15/-0.08 0.08 0.08
Symbol b b1 c c1 1 2 3 L L1 aaa bbb ccc e S
Typ 0.23 0.20 0.18 0.15 3.0 12.0 12.0 0.55 0.95BSC 0.10 0.08 0.25 0.50 BSC 0.50 BSC
Tol +0.07/-0.08 0.05 0.08 +0.03/-0.02 3.0 3.0 3.0 0.15 -
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Package Drawings and Markings
Notes: 1. 2. 3. 4. 5. 6. 7. All dimensions are in millimeters, angles in degrees, unless otherwise specified. Datums B and C to be determined at datum plane H. Dimensions D and E1 are to be determined at datum plane H. Dimensions D2 and E2 are for top package; dimensions D and E1 are for bottom package. Cross section A-A to be determined at 0.13 to 0.25mm from lead tip. Dimensions D and D2 do not include mold flash, protrusion, or gate burrs. Dimensions E1 and E2 do not include interlead flash or protrusion.
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Package Drawings and Markings
Figure 18. 10-pin TDFN Package (3.0x3.0mm)
D D/2
-B-
SEE DETAIL B
PIN 1 MARKER
-A-
D2 D2/2
E/2
NXL
E2/2 E2 NXK N N-1 e 6 (ND-1) X e
BOTTOM VIEW
aaa C 2x
E
INDEX AREA (D/2 xE/2)
4 10 NXb 5 CAB
INDEX AREA (D/2 xE/2) 4
aaa C 2x TOP VIEW
bbb ddd C
7
8
10 NX
ccc C 0.08 C
A
SIDE VIEW A1 A3
SEATING PLANE
-C-
D
Datum A or B
L1
E
e Terminal Tip DETAIL B
5
TYPE A
ODD TERMINAL SIDE
Symbol A A1 A3 L1 L2 K K2 b e aaa bbb ccc ddd eee ggg
Min 0.70 0.00
Typ 0.75 0.02 0.20 REF
Max 0.80 0.05 0.15 0.13 14
0 0.20 0.17 0.18
0.25 0.5 0.15 0.10 0.10 0.05 0.08 0.10
0.30
Notes 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2, 5 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2
Symbol D BSC E BSC D2 E2 L N ND
Min
Variations Typ 3.00 3.00
L2
Max
2.20 1.40 0.30
0.40 10 5
2.70 1.75 0.50
Notes 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2 1, 2, 5
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Package Drawings and Markings
Notes: Dimensioning and tolerancing are compliant with ASME Y14.5M-1994. Dimensions are in millimeters, angles in degrees (). N is the total number of terminals. The terminal 1 identifier and terminal numbering convention shall conform to JESD 95-1 SPP-012. Details of terminal 1 identifier are optional, but must be located within the zone indicated. The terminal 1 identifier may be either a mold, embedded metal or mark feature. 5. Dimension b applies to metallized terminal and is measured between 0.15 and 0.30mm from terminal tip. 6. ND refers to the maximum number of terminals on D side. 7. Variation shown in Figure 18 is for illustration purposes only. 8. For variation identifier dimension details, refer to the Dimensions table. 9. For a complete set of dimensions for each variation, refer to the Variations table. 10. Unilateral coplanarity zone applies to the exposed heat sink slug and the terminals. 11. For a rectangular package, the terminal side of the package is determined by: - Type 1: Terminals are on the short side of the package. - Type 2: Terminals are on the long side of the package. 12. Variations specified as NJR (non JEDEC registered), with an additional dash number (e.g., -1, -2) are packages currently not registered with JEDEC. 13. When more than one variations exist for the same profile height, body size (DxE), and pitch, then those variations will be denoted by an additional dash number (i.e., -1,-2) for identification. The new variations shall be created based on any or all of the following factors: terminal count, terminal length, and exposed pad sizes. 1. 2. 3. 4.
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10 Ordering Information
The devices are available as the standard products shown in Table 5. Table 5. Ordering Information Type AS1744G AS1744G-T AS1744V-T AS1745G AS1745G-T AS1745V-T

Description Dual SPDT Switch Dual SPDT Switch Dual SPDT Switch Dual SPDT Switch Dual SPDT Switch Dual SPDT Switch
Delivery Form Tube Tape and Reel Tape and Reel Tube Tape and Reel Tape and Reel
Package 10-pin MSOP 10-pin MSOP 10-pin TDFN 10-pin MSOP 10-pin MSOP 10-pin TDFN
Available upon request. Contact austriamicrosystems, AG for details.
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Copyrights
Copyright (c) 1997-2006, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered (R). All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com
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